Co-packaged optics moves photonic engines onto the compute package
Hyperscalers and chip designers are increasingly integrating photonic engines directly onto the same package as compute silicon rather than routing signals through separate pluggable transceiver modules connected by traditional cabling, cutting signal loss and power consumption meaningfully compared to conventional architectures. This integration fundamentally changes how chip packaging and optical component teams collaborate, since photonic engines must now be designed alongside compute silicon from the earliest architecture planning stages rather than procured as an independent afterthought. Major chip designers have announced co-packaged optics roadmaps spanning multiple future product generations, signaling genuine architectural commitment beyond pilot testing.
Market Impact: 48% of clusters now optical-first

